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電子發(fā)燒友網(wǎng)>電子資料下載>電源技術>電源及看門狗定時器監(jiān)控電路ADM9690數(shù)據(jù)表

電源及看門狗定時器監(jiān)控電路ADM9690數(shù)據(jù)表

2017-10-26 | rar | 0.10 MB | 次下載 | 免費

資料介紹

  The ADM9690 contains a voltage monitoring comparator and a watchdog timer monitor. It is designed to monitor the 5 V power supply to a microprocessor and the microprocessor operation via a watchdog function. The voltage monitoring comparator monitors the voltage on VMON. If it drops outside tolerance, as will happen during a power-fail, two reset signals are generated. Both reset signals go active (low) simultaneously. They will remain active while VMON is below the threshold, and for 50 ms (RESET(1)) or 60 ms (RESET(2)) after VMON climbs above the reset threshold. RESET(1) is intended to provide a power-on reset signal for the μP while RESET(2) is used to hold additional circuitry in a reset state until the μP has regained control following a power-up. The voltage monitoring circuitry remains operational with VCC as low as 2 V. The watchdog timer monitoring circuit is designed to monitor the activity on the WDI input. This input is normally connected to an output line on the μP. Its function is to check that the microprocessor has not stalled in an infinite loop. If there is a period of inactivity for the watchdog timeout period, both reset outputs are activated. As above, RESET(1) remains low for 50 ms while RESET(2) remains low for an additional 10 ms. The watchdog timer is restarted when RESET(1) goes inactive. The actual watchdog timeout period is adjustable using two select inputs SEL1 and SEL2. The ADM9690 is available in an 8-lead SOIC package. It is specified over the industrial temperature range.
電源及看門狗定時器監(jiān)控電路ADM9690數(shù)據(jù)表

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