資料介紹
The \x92FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB\, LEBA\) and output-enable (OEAB\, OEBA\) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB\) input must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch-enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB\ signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ low, the 3-state B-output buffers are active and reflect the data present at the output of the A latches.
- CY74FCT2573CT,pdf(8-Bit Latch)
- CY74FCT2573AT,pdf(8-Bit Latch)
- CY74FCT2373CT,pdf(8-Bit Latch)
- CY74FCT2373AT,pdf(8-Bit Latch)
- CY74FCT825CT,pdf(8-Bit Bus-Int
- CY74FCT162646AT,pdf(16-Bit Lat
- CD74HCT652,pdf(16-Bit Latched
- CY74FCT543AT,pdf(8-Bit Latched
- CY74FCT2543T,pdf(8-Bit Latched
- CY74FCT2543AT,pdf(8-Bit Latche
- CY74FCT16543CT,pdf(16-Bit Latc
- CY74FCT16543AT,pdf(16-Bit Latc
- CY74FCT162H543CT,pdf(16-Bit La
- CY74FCT162543CT,pdf(16-Bit Lat
- CY74FCT16543T,CY74FCT162543T,C
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